12.2.1.1. Pouzdra

12.2.1.1. Pouzdra
	12.2.1. LPC210x

Řadiče se dodávají v pouzdrech LQFP48 (SOT313-2) a HVQFN48 (SOT619-1)

Zapojení vývodů:

Tabulka 12.1. Vývody LPC210x v pouzdře LQFP48 a HVQFN48

Pin	Primary	First Alternate	Second Alternate
1	P0.19	MAT1.2 timer 1, channel 2	TCK primary JTAG
2	P0.20	MAT1.3 timer 1, channel 3	TDI primary JTAG
3	P0.21	PWM5 PEM output 5	TDO primary JTAG
4	NC
5	V_DD1.8
6	!RST
7	V_SS1
8	P0.27	TRACEPKT0 Trace Packet bit 0	TDRST secondary JTAG
9	P0.28	TRACEPKT1 Trace Packet bit 1	TMS secondary JTAG
10	P0.29	TRACEPKT2 Trace Packet bit 2	TCK secondary JTAG
11	X1
12	X2
13	P0.0	TxD0 UART 0 Transmitter output	PWM1 PWM output 1
14	P0.1	RxD0 Receiver, UART 0	PWM3 PWM output 3
15	P0.30	TRACEPKT3 Trace Packet bit 3	TDI secondary JTAG
16	P0.31	EXTIN0 Trigger Input	TDO secondary JTAG
17	V_DD3
18	P0.2	SCL I²C clock	CAP0.0 capture timer 0 ch 0
19	V_SS2
20	NC
21	P0.3	SDA I²C data	MAT0.0 match timer 0 ch 0
22	P0.4	SCK I²C serial clock	CAP0.1 capture timer 0 ch 1
23	P0.5	MISO SPI master input	MAT0.1 match timer 0 ch 1
24	P0.6	M0SI SPI master output	CAP0.2 capture timer 0 ch 2
25	NC
26	RTCK
27	DBGSEL
28	P0.7	SSEL SPI slave select	PWM2 PWM output 2
29	P0.8	TxD1 UART 1 Transmitter	PWM4 PWM output 4
30	P0.9	RxD1 UART 1 Receiver	PWM6 PWM output 6
31	V_SS3
32	P0.22	TRACECLK Trace Clock
33	P0.23	PIPESTAT0 Pipeline Status bit 0
34	P0.24	PIPESTAT1 Pipeline Status bit 1
35	P0.10	RTS1 UART 1	CAP1.0 capture timer 1 ch 0
36	P0.11	CTS1 UART 1	CAP1.1 capture timer 1 ch 1
37	P0.12	DSR1 UART 1	MAT1.0 match timer 1 ch 0
38	P0.25	PIPESTAT2 Pipeline Status bit 1
39	P0.26	TRACESYNC trace synchronization
40	V_DD3
41	P0.13	DTR1 UART 1	MAT1.1 match timer 1 ch 1
42	NC
43	V_SS4
44	P0.14	DCD1 UART 1	EINT1 interrupt 1
45	P0.15	RI1 UART 1	EINT2 interrupt 2
46	GPIO P0.16	EINT0 interrupt 0	MAT0.2 match timer 0 ch 2
47	P0.17	CAP1.2 capture timer 1 ch 2	TRST primary JTAG
48	P0.18	CAP1.3 capture timer 1 ch 3	TMS primary JTAG


12.2.1. LPC210x		12.2.1.2. Mapa paměti