| 63.2.2. OPR (OPeRate) instrukce | ||
|---|---|---|
 | 63.2. Instrukční sada |  |
| 63.2.2. OPR (OPeRate) instrukce | ||
|---|---|---|
| | 63.2. Instrukční sada | |
OPR není instrukce ale tři skupiny mikrokódovcýh operací. Základním kódem je 111 xxx xxx xxx. Devět bitů instrukčního slova kódují jednu ze tří skupin a jednotlivé bity spouští jednotlivé mikrooperace ve skupině. Tento způsob kódování mikrooperací je použit mimo jiné například v počítači TX-0.
A nyní k rozlišení jednotlivých skupin. Prvotním dělícím prvkem je hodnota bitu b3. Pokud má tento bit hodnotu 0, jedná se o skupinu 1. Pokud má hodnotu 1 jedná se o skupinu 2 nebo 3. Mezi skupinami 2 a 3 pak rozlišuje hodnota bitu b11, hodnota 0 znamená skupinu 2 a hodnota 1 pak skupinu 3 a EAE rozšíření.
Obrázek 63.9. Rozdělení OPR na skupiny a koncentrovaný popis mikroinstrukcí (PDP-8)
0 1 2 3 4 5 6 7 8 9 10 11 +---+---+---+---+---+---+---+---+---+---+---+---+ | | | | | | |RAR|RAL| 0 | | | 1 1 1 | 0 |CLA|CLL|CMA|CML|RTR|RTL| 1 |IAC| Skupina 1 | | | | | | | 0 | 0 |BSW| | | | | | | | | 1 | 1 | x | | nepovolená kombinace +---+---+---+---+---+---+---+---+---+---+---+---+ | | | |SMA|SZA|SNL| 0 | | | | | 1 1 1 | 1 |CLA|SPA|SNA|SZL| 1 |OSR|HLT| 0 | Skupina 2 | | | | 0 | 0 | 0 |SKP| | | | +---+---+---+---+---+---+---+---+---+---+---+---+ | 1 1 1 | 1 |CLA|MQA|SCA|MQL|EAE opcode | 1 | Skupina 3 (EAE) +---+---+---+---+---+---+---+---+---+---+---+---+
Bity mikrokódové instrukce spouštějí jednotlivé mikroinstrukce. Tyto ale mohou, a také ovlivňují stejné registry. Například instrukce CLA, CMA, RAR, RAL a IAC všechny mění obsah registru AC. Protože jsou přípustné i kombinace mikroinstrukcí, jsou tyto rozdělěny do sekvencí které se vykonávají postupně. Takto je zajištěno, že například kombinace mikroinstrukcí CLA IAC skončí s hodnotou 1 v akumulátoru AC. Pořadí sekvencí je uvedeno v seznamu:
Skupina 1
Sekvence 3: Increment
Mikroinstrukce v jednotlivých sekvencích jsou voleny tak, aby mohly být v rámci sekvence vykonávány všechny najednou, paralelně. U bitů ve čtvrté sekvenci popisujících rotaci je tomu jinak, protože všechny tři tyto bity kódují jen jednu operaci.
Tabulka 63.8. Kombinace bitů mikroinstrukcí pro rotace ve skupině 1
| b8 | b9 | b10 | instrukce |
|---|---|---|---|
| 0 | 0 | 0 | NOP |
| 0 | 0 | 1 | BSW |
| 0 | 1 | 0 | RAL |
| 0 | 1 | 1 | RTL |
| 1 | 0 | 0 | RAR |
| 1 | 0 | 1 | RTR |
| 1 | 1 | 0 | ilegální kombinace |
| 1 | 1 | 1 | ilegální kombinace |
Instrukční slovo skupiny 1 vypadá takto.
Obrázek 63.10. Group 1 microinstructions of PDP-8
0 1 2 3 4 5 6 7 8 9 10 11 +---+---+---+---+---+---+---+---+---+---+---+---+ | 1 1 1 | 0 |CLA|CLL|CMA|CML| |BSW|IAC| +---+---+---+---+---+---+---+---+---+---+---+---+ ↑ ↑ ↑ ROTATE AC AND L RIGHT -----------+ | | ROTATE AC AND L LEFT ----------------+ | ROTATE 1 POSITION IF 0, 2 POSITIONS IF 1-+ (BSW IF BITS 8,9 ARE 0) LOGICAL SEQUENCE: 1 - CLA, CLL 2 - CMA, CML 3 - IAC 4 - RAR, RAL, RTR, RTL, BSW
Tabulka 63.9. Group 1 Microinstructions od PDP-8
| MNEMONIC | OPCODE | OPERATION |
|---|---|---|
| NOP | 7000 | No Operation. This instruction causes a 1-cycle delay in program execution, without affecting anything. It may be used for timing synchronization or as a convenient means of deleting another instruction from program. |
| IAC | 7001 | Increment Accumulator. AC+1→AC. |
| BSW | 7002 | Byte Swap. AC0-5↔AC6-11. Value in lower six bits in AC is swapped with value in upper six bits in AC. |
| RAL | 7004 | Rotate Accumulator Left. AC1-11→AC0-10, L→AC11, AC0→L. <AC,L> is rotated left. |
| RTL | 7006 | Rotate Two Left. Same as RAL, RAL. |
| RAR | 7010 | Rotate Accumulator Right. AC0-10→AC1-11, L→AC0, AC11→L. <AC,L> is rotated right. |
| RTR | 7012 | Rotate Two Right. Same as RAR, RAR. |
| CML | 7020 | Complement Link. ¬L→L. |
| CMA | 7040 | Complement Accumulator. ¬AC→AC. |
| CLL | 7100 | Clear Link. 0→L. |
| CLA | 7200 | Clear Accumulator. 0→AC. |
| CIA | 7041 | Complement and Increment Accumulator. CMA IAC. -AC→AC. |
| STL | 7120 | Set the Link. CLL CML. 1→L. |
| STA | 7240 | Set the Accumulator. CLA CMA. 7777→AC. |
| GLK | 7204 | Get the Link. CLA RAL. L→AC11, 0→L. |
Skupina 2
Instrukční slovo skupiny 2 vypadá takto.
Obrázek 63.11. Group 2 microinstructions of PDP-8
0 1 2 3 4 5 6 7 8 9 10 11
+---+---+---+---+---+---+---+---+---+---+---+---+
| 1 1 1 | 1 |CLA|SMA|SZA|SNL| |OSR|HLT| 0 |
+---+---+---+---+---+---+---+---+---+---+---+---+
↑
REVERSE SKIP SENSING OF BITS 5,6,7 IF SET+
LOGICAL SEQUENCE: 1 (BIT 8 IS 0) - SMA ∨ SZA ∨ SNL
(BIT 8 IS 1) - SPA ∧ SNA ∧ SZL
2 - CLA
3 - OSR, HLTTabulka 63.10. Group 2 Microinstructions od PDP-8
| MNEMONIC | OPCODE | OPERATION |
|---|---|---|
| HLT | 7402 | Halt. Clears the run flip-flop so that program execution stops at the end of TP4 of the current machine cycle. |
| OSR | 7404 | Logical OR with Switch Register. The content of th programmer's console switch register (SR) is combined with the content of the AC by a bitwise OR operation. The result is left in the AC and the original content of the AC is lost. The content of the SR is not affected. |
| SKP | 7410 | Skip. The content of the PC is incremented by 1, to skip the next sequential instruction. |
| SNL | 7420 | Skip on Non-Zero Link. The conetent of the link is sampled. If the link contains a 1, the content of the PC is incremented to skip the next sequential instruction. If the link contains a 0, the next instruction is executed. |
| SZL | 7430 | Skip on Zero Link. The conetent of the link is sampled. If the link contains a 0, the content of the PC is incremented to skip the next sequential instruction. If the link contains a 1, the next instruction is executed. |
| SZA | 7440 | Skip on Zero Accumulator. The content of each bit of the AC is sampled. If every bit contains a 0, the content of the PC is incremented to skip the next sequential instruction. If any bit contains a 1, the next instruction is executed. |
| SNA | 7450 | Skip on Non-Zero Accumulator. If AC≠0 then PC+1→PC. So the next sequential instruction is skipped. Otherwise execution continues with the next sequential instruction. |
| SMA | 7500 | Skip on Minus Accumulator. IF AC0=1 then PC+1→PC. |
| SPA | 7510 | Skip on Positive Accumulator. IF AC0=0 then PC+1→PC. |
| CLA | 7600 | Clear Accumulator. 0→AC. |
| SZA SNL | 7460 | Skip if AC=0 or L=1. |
| SNA SZL | 7470 | Skip if AC=0 and L=0. |
| SMA SNL | 7520 | Skip if AC<0 or L=1. |
| SPA SZL | 7530 | Skip if AC≥0 and L=0. |
| SMA SZA | 7540 | Skip if AC≤0. |
| SPA SNA | 7550 | Skip if AC>0. |
| SMA SZA SNL | 7560 | Skip if AC≤0 or L=1. |
| SPA SNA SZL | 7570 | Skip if AC>0 or L=0. |
Nepoužité kombinace OPR byly dány do třetí skupiny mikroprogramových akcí.
Obrázek 63.12. Group 3 microinstructions of PDP-8
0 1 2 3 4 5 6 7 8 9 10 11 +---+---+---+---+---+---+---+---+---+---+---+---+ | 1 1 1 | 1 |CLA|MQA| |MQL| | | | 1 | +---+---+---+---+---+---+---+---+---+---+---+---+ LOGICAL SEQUENCE: 1 - CLA 2 - MQA, MQL 3 - ALL OTHERS
Tabulka 63.11. Group 3 Microinstructions od PDP-8
| MNEMONIC | OPCODE | OPERATION |
|---|---|---|
| CLA | 7601 | Clear Accumulator. Each bit of the AC is loaded with a binary 0. |
| MQL | 7421 | Multiplier Quotient Load. The content of the AC is loaded into the MQ. The AC is cleared and the original content of the MQ is lost. |
| MQA | 7501 | Multiplier Quotient into Accumulator. The content of the MQ is combined with the content of the AC by a bitwise logical OR operation, and the result is loaded into the AC. The original content of the AC is lost, but the original contento of the MQ is not affected. Note that this instruction provides the programmer with a direct insclusive OR operation. |
| SWP | 7521 | Swap Accumulator and Multiplier Quotient. The content of the AC and the content of the MQ are exchanged. This is a microprogrammed combination of MQA and MQL. |
| CAM | 7621 | Clear Accumulator and Multiplier Quotient. Each bit of both the AC and the MQ loaded with a binary 0. This is microprogrammed combination of CLA and MQL. |
| |  | |
| 63.2.1. IOT (Input-Output Transfer) instrukce |  | 63.2.3. Nultá stránka paměti |
